The multilayer interconnect structures of semiconductor devices in recent years have been increasingly high integration, increased speed, and further miniaturization.
While miniaturization progresses, the spacing between interconnects becomes narrower, and resistance of interconnects and intra-interconnect parasitic capacitance have come to have a major effect on signal transmission rate of the semiconductor device.
In order to avoid the interconnect delay based on interconnect resistance and intra-interconnect parasitic capacitance, there has been a tendency recently to shift from the use of aluminum as an interconnect material to lower resistance copper, and also there has been a trend for the use of low dielectric constant materials for the interlayer insulating layer.
In order to prevent the diffusion of copper in a semiconductor device provided with copper interconnect, for example, a copper barrier film is formed at the interface between the interlayer insulating layer and the copper interconnect. This type of copper barrier layer is formed by the below mentioned production steps.
FIGS. 1A to 1C are cross-sectional drawings of the conventional copper barrier film formation process. These figures show forming the copper interconnect by, for example, the electroplating method in the interlayer insulating layer of low dielectric constant material, and forming the copper barrier film over the copper interconnect.
As shown in FIG. 1A, a native oxide film 102 on the surface of a copper interconnect 101 is removed. Ammonia, for example, is used as the reducing gas. The ammonia is activated by plasma, the surface of the interconnect 101 is exposed to the activated gas, and the native oxide film 102 is removed.
As a pretreatment for formation of the copper barrier film, as shown in FIG. 1B, the surface of the copper interconnect 101 is exposed to silane gas, and a solid solution intermediate layer 103 including silicon is formed on the copper interconnect 101 surface. This intermediate layer 103 functions as an adhesion layer between the copper interconnect 101 and a below described copper barrier film.
As shown in FIG. 1C, plasma Chemical Vapor Deposition (CVD) is used to form a copper barrier film 104 including silicon carbide. The copper barrier film 104 over the copper interconnect 101 prevents the copper diffusing into the interlayer insulating film.
However, reactivity of the silane at the metal surface is high, and there are instance of excessive reaction at the copper interconnect 101 surface. As a result, there are instances of formation of high resistance copper silicide on the surface or interior of the copper interconnect 101. Also there are instances of short circuiting of the copper interconnect 101 due to abnormal growth.
In order to avoid these problems, a method which uses, as a raw material gas for formation of the intermediate layer 103, trimethylsilane is known.
The trimethylsilane suppresses growth of copper silicide, and an amorphous intermediate layer 103 is formed at the interface between the copper barrier layer 104 and the copper interconnect 101.